The standards that describe the size, shape, and major features of components so that they work together properly.
ATX (Advanced Technology Extended)
Most popular form factor developed by Intel in 1995.
Smaller version of ATX reducing the number of expansion slots on the motherboard, reducing the power supplied to the board, and allowing for a smaller case.
A smaller version of MicroATX that allows for maximum flexibility, and therefore can be a good choice for custom systems.
Has up to 4 expansion slots.
Single power connector with 20 pins.
4-Pin Molex Connector
AGP Slot (Accelerated Graphics Slot)
Motherboard video slots and video cards use these slots, however these slots are being replaced by PCI Express.
PCI (Peripheral Component Interconnect)
most common type of expansion slots
NLX (New Low-Profile Extended)
A form factor developed Intel in 1998 for low-end personal computer motherboards, to improve on an older and similar form factor.
PGA (Pin Grid Array)
A socket with pins aligned in uniform rows around the socket.
SPGA (Staggered Pin Grid Array)
A socket with pins staggered over the socket to squeeze more pins into a small space.
LGA (Land Grid Array)
A socket that uses lands rather than pins.
ZIF (Zero Insertion Force)
A socket with a lever on the side of the socket.
A set of chips on the motherboard that collectively controls the memory, buses on the motherboard, and some peripherals.
The fast end of the hub, which contains the graphics and memory controller, which connects to the system bus.
The slower end of the hub which contains the I/O controller hub. All I/O devices, except display and memory, connect to the hub by using this.
Chips on the motherboard require this to function.
Some wires on a bus carry these to coordinate all the activity.
Numbers assigned to physical memory located either in RAM or ROM chips. ___________ are communicated on the address bus. Components pass these to one another, telling each other where to access data or instructions.
_____ passes over a bus in a group of wires, just as memory addresses do. The number of lines in the bus used to pass _____ determines how much _____ can be passed in parallel at one time.
If the processor requests something from one of these devices and the device is not ready, the device issues a __________.
PCIe (PCI Express) Slot
A faster expansion slot designed to replace both AGP and PCI. Comes in 4 different slot sizes... x1, x4, x8, x16.
AMR or CNR Slot
The plate that you install in the computer case that provides holes for these I/O ports. This is designed for the case's form factor and the holes in it are positioned for the motherboard ports.
DIP Switch (Dual Inline Package)
Some older motherboards and expansion cards store setup data using this. This has an ON and an OFF switch. ON=1, OFF=0.
These are considered open or closed based on whether this item's cover is present on two small posts or metal pins that stick up from the motherboard.
Hard Boot or Cold Boot
This process involves turning on the power with the on/off switch.
Soft Boot or Warm Boot
This process involves using the operating system to reboot.
POST (Power On Self Test)
This process is performed by startup BIOS when the computer is first turned on, and is stored in ROM-BIOS.
A line of a motherboard bus that a hardware device or expansion slot can use to signal the CPU that the device needs attention. Some lines have a higher priority for attention than others. Each _____ line is assigned a number (0-15) to identify it.
Numbers assigned to hardware devices that software uses to send a command to a device. Each device "listens" for these numbers and responds to the ones assigned to it. __________ are communicated on the address bus.
A number designating a channel on which the device can pass data to memory without involving the CPU. Think of these as a shortcut for data moving to and from the device and memory.
Flashing the BIOS
The process of upgrading or refreshing the ROM BIOS chip.
Spacers or Standoffs
Round plastic or metal pegs that separate the motherboard from the case, so that components on the back of the motherboard do not touch the case.
Front Panel Header
Level 1 Cache
Memory on the processor die.
Level 2 Cache
Memory in the processor package, but not on the processor die.
Level 3 Cache
A cache farther from the processor core, but still in the processor package.
The connection between the CPU and the L2 cache is called the ___. The processor's internal bus operates at a much higher frequency than the external bus (System Bus).
Wires that connect the CPU to the main system RAM. Also known as the external bus.
The speed at which the processor operates internally.
Running a motherboard or processor at a higher speed than the manufacturer. Overheating is a danger with this.
Installing more than one processor on a motherboard to help improve performance.
The processor housing contains two or more cores that operate at the same frequency, but independently of each other.
a CPU that includes two microprocessors (cores) on a single integrated circuit. (Supporting 4 instructions at once)
Three cores (Supports 6 instructions at once)
Four cores (Supporting 8 instructions at once)
Eight Cores (Supporting 16 instructions at once)
RAM that holds data and instructions that the memory controller anticipates the processor will need next.
DRAM (Dynamic RAM)
One of the major types of RAM. It is the most common type used in Personal Computers. This type of RAM loses data rapidly and must be refreshed often. Refreshing makes it slower than SRAM
SRAM (Static RAM)
A basic type of memory, once information is stored, it remains stored until the information is changed or power is removed from the device. Doesn't need to be refreshed. More expensive than DRAM
Groups of instructions that accomplish fundamental operations, such as comparing or adding two numbers, are permanently built into the processor chip.
______ Processors include, Phenom, Athlon, Sempron, and Turion.
MBR (Master Boot Record)
A hard drive has this at the beginning of the drive that contains the partition table, which contains a map to partitions on the drive.
Power On Self Test
POST is abbreviated for...
Fins that draw heat away from the processor. The fan can then blow heat away.
A cream-like substance placed between the bottom of the cooler heatsink and the top of the processor. This substance eliminates air pockets, helping to draw heat off the processor.
ACPI (Advanced Configuration and Power Interface)
The current set of standards that is used by BIOS, hardware, and the OS to manage power.
The hard drive and monitor are turned off and everything else runs normally. "Sleep Mode"
The hard drive, monitor, and processor are turned off. Also called "Sleep or Standby Mode"
Everything is shut down except RAM and enough of the system to respond to a wake-up call such as pressing the keyboard or moving the mouse.
Hibernation. Everything in RAM is copied to a file on the hard drive and then the system shuts down. When power is restored, the system does not have to go through the slow boot process, but can quickly read contents of the hibernation file and restore the system to exactly as it was before S4 state was enabled.
The value the system bus speed is multiplied by to get the processor speed.
The core of a processor has __ arithmetic logic units (ALUs). Multi-core processors have 2, 3, or 4 cores. Each core can process two threads at once.
Hyper-Threading (Intel) or Hyper-Transport (AMD)
The technology that allows a processor to handle multiple threads in parallel.
Single Inline Memory Module
SIMM is abbreviated for... Memory that has 30 or 72 Pins.
Dual Inline Memory Module
DIMM is abbreviated for...
SO-DIMM ... What does the SO stand for?
RIMM memory has ____ pins.
What does the S in SDRAM stand for? SDRAM has 168 pins.
Double Data Rate SDRAM
What does the DDR stand for in DDR SDRAM? DDR has 184 pins.
The memory a processor addresses at one time and is 64 bits wide.
To improve overall memory performance, __________ allow the memory controller to communicate with 2 DIMMs at the same time, effectively doubling the speed of memory access.
Error Correcting Code
ECC Stands for?
Column Access Strobe
CAS Latency stands for? This is used more than RAS Latency. The lower the number the faster. (i.e. CL8 is a little faster than CL9)
Row Access Strobe
RAS Latency stands for?