CPE 221 Final Exam Vocab
Terms in this set (63)
A _____ points to a place on the stack and can change throughout the lifetime of an instance of a procedure.
A _____ control unit runs a program whose input is the machine-level op-code to be executed and whose output is the bus enables, multiplexer controls, clocks, and signal that control the processor
Pipelining is a technique in for improving the _____ of instruction execution.
A 1 address instruction has a register, called the _____ to hold one operand and the result.
_____ is a load/store RISC ISA that has 32 general purpose registers.
High-level language programmers use _____ to represent any type of data element they define.
An _____ is an event that forces the computer to stop normal processing and to switch control to the operating system.
_____ is a technique for improving the throughput of instruction execution.
A _____ is a region of temporary storage at the top of the current stack.
The computer has a _____ that contains the address of the next instruction to be executed.
A _____ points to a place on the stack and does not change throughout the lifetime of an instance of a procedure.
_____ memories retain stored data only as long as they receive electric power.
_____ employs a semiconductor technology that stores data as an electrostatic charge in a capacitor.
Address _____ deals with the way in which address components are mapped onto a processor's physical address space.
_____ RTL is implementation independent.
A two-way set associative cache has _____ sets.
_____ uses cross-coupled transistors to store one bit of memory.
The _____ signal enables the operation of a particular memory module.
The principal of _____ locality states that items that have been recently accessed will be accessed again soon.
A fully associative cache has _____ set.
An ARM processor has _____ registers.
Each register holds _____ bits.
In the ARM statement, ADD r0, r1, r2, _____ is the destination register.
_____ is a notation to define operations.
The _____ is a register that holds the address of the instruction currently being executed.
program counter or PC
_____ RTL describes what can be done in a single clock cycle.
A _____ represents the organization of the computer in terms of registers, functional units, and buses.
Microprogrammed control is the alternative to _____ control.
The amount of time it takes to execute a single instruction will _____ as a result of pipelining.
The _____ of a variable defines the range of its visibility or accessibility within a program.
C++ is an example of a _____ language.
Static RAM does not require _____.
Most instructions take _____ cycles to execute on a 2-bus SRC than they do on a 1-bus SRC.
_____ numbers may have either positive or negative values.
A _____ maps a high-level language into machine language constructs.
The _____ forms the interface between the program and the functional units of the computer.
instruction set architecture
_____ mimic hardware performance in software, they are usually slower in operation by orders of magnitude.
RTN is a _____ language -- a language used to describe a language.
A _____ consists of 8 bits.
A _____ logic element is a circuit whose output depends only on its current inputs.
An AND gate has a controlling value of _____.
The symbol for an inverter is _____
| / ⁰
A _____ is used to control the access to a bus from the output of a register.
_____ requires refreshing.
The principle of _____ locality states that items close to an item referenced are likely to be referenced in the near future.
An _____ computer is one that is dedicated to doing one task, such as the one found in washing machines.
_____ are used to hold data when faster access than main memory is needed.
_____ instructions can alter the normal flow of control from executing the next instruction in sequence.
In RTL, the symbol _____ is used to indicate a data transfer.
_____ is an example of an addressing mode found in processors.
direct, indexed, immediate, indirect
1d instructions read from memory in stage _____ of the SRC pipeline.
Branches that do not link complete in stage _____ of the SRC pipeline.
In certain circumstances, a data dependence can become a data _____.
In the microcoding described in this class, a PLA uses the _____ of an instruction to determine where the microcode for that instruction is located.
A _____ capability is one that initializes a processor to a known, defined state.
The instruction _____ specifies the size and meaning of fields within the instruction.
_____ instructions move data from a memory location or register to another memory location without changing its form.
A 0-address instruction uses a _____ to hold both operands and the result.
In _____ microcode, each control signal is represented by a bit in the microinstruction.
In _____ microcode, each distinct microinstruction is encoded as a single signal that is fanned out to the control signals that are to be asserted.
The bit line _____ operation causes the difference between access time and cycle time.
The design of the storage cells and the interconnections between them is known as the _____.
A _____ is the address to which control is transferred as a result of a branch instruction.
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