DD- lab

What is an integrated circuit?
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Terms in this set (106)
What is an integrated circuit?
an electronic circuit formed on a small piece of semiconducting material, performing the same function as a larger circuit made from discrete components.
List the two types of IC technologies that are the most widely used.
CMOS

Bipolar
Define ICCL and ICCH
ICCL- supply current drawn during LOW state

ICCH- supply current drawn during HIGH state.
VIL and VIH.
VIL is the LOW level input voltage for a logic gate, and VIH is the HIGH level input voltage.The
VOL and VOH.
VOL is the LOW level output voltage and VOH is the HIGH level output voltage.
speed-power product.
-product of the propagation delay time and the power dissipation

-expressed in joules (J), which is the unit of energy

-The formula is SPP = tpPD

-useful for comparing the various logic gate series or for
comparing a CMOS gate to a TTL gate.
SR characteristic equation
Q(next) = S + R'Q
SR = 0
JK characteristic equation
Q(next) = JQ' + K'Q
D characteristic equation
Q(next) = D
T characteristic equation
Q(next) = TQ' + T'Q
CounterA counter is a digital device which produces an output of sequence of numbers. The output count of the counter is usually triggered by a clock signal.Types of counterUp counter- which increments one by one (eg. 0,1,,2,3,4,5............15 for a 4 bit counter) Down counter- which decrements one by one (eg. 15,14,13,12,11,10,9,8................0 for a 4 bit counter.)Asynchronous counter-(ripple) counter -complementing flip-flop output transition is source for triggering other flip-flops - output of each flip-flop is connected to the input of the clock input of the next higher-order flip-flop.binary up-count counter (4-bit)-starts with binary 0 -increments by 1 with each count of the pulse input -After count is 15, counter goes to 0 and repeatsbinary count-down counter (4-bit)-starts with binary 15 -value decreases by 1 with each count of the pulse input -After count is 0, counter goes to 15 and repeatsSynchronous counter-the flip-flop's output transition is controlled by a common clock. -when common clock applied simultaneously triggers all the flip-flops. -decision whether a flip-flop is to be complemented or not is determined from the values of the data inputssynchronous counter-A synchronous 4-bit up counter and down counter built from JK flip-flops and AND gates -The flip-flops are triggered on the positive or negative edge of the clock -The polarity of the clock is not essential here. -for down counter, the inputs to the AND gates must come from the complement outputs instead of the normal outputs of the previous flip-flops.How many flip-flops are required to make a MOD-32 binary counter?5Asynchronous counters are also called as __________.ripple countersDifferentiate synchronous and asynchronous counter.In asynchronous counters, flip flops aren't triggered simultaneously unlike in synchronous counters. Synchronous counters do not produce any decoding errors and are faster than asynchronous countersList some applications of digital counter.- conversion from analog to digital -in appliances requiring timers -can also be used in large buildings to keep data on the amount of people present -in the design of triangular wave generators.circuit diagram for the binary count-down counter-If negative-edge triggered flip-flops are used then the clock input of each flip-flop must be connected to the complement output of the previous flip-flop -When the true output goes from 0 to 1, the complement will go from 1 to 0 and hence will complement the required next flip-flop.register-a digital circuit with data storage and data movement functions -consists of one or more flip-flops used to store and shift data -an important memory device because of its storage capability -The total number of bits a register can store is the storage capacity of the register -The shifting capability of the shift register permits the movement of data stage to stage (stage in a shift register represents one bit of storage capacity) within a register or into or out of the register upon application of the clock pulse.types of shift register-Serial-in Serial- out -Serial-in Parallel-out -Parallel-in Serial-out -Parallel-in Parallel-outSerial-In Serial-OutThe serial-in serial-out shift register accepts data serially, one bit at a time on the single data input line.Serial-In Parallel-OutData bits are serially entered into the shift register one bit at a time. The data bits are taken out of the register in a parallel manner where the output of each stage is available simultaneously.Parallel-In Parallel-Out-data bits enter into the shift register simultaneously (parallely) at a time -data bits are taken out of the register in a parallel manner where the output of each stage is available simultaneously.Number of flip-flops required to store m bits in a register ismWhat is universal shift register?A register which has both right and left shift that have the capability of parallel loadShift register capable of shifting in only one direction is calledUnidirectional shift registerMention two applications of a register.- used as memory elements in computers -receivers and transmitters in digital conversion blocks.SR Latch- an asynchronous device whose output relies only on the states of S and R inputs -can be created from two NOR gates that have a cross-feedback loop. -can also be made from NAND gates but the inputs are swapped and negated.Gated SR latch-an extension of SR latch with additional Enable input signal. -The enable signal must be active before the data can be latched. -When the Enable input is low, then the outputs from the AND gates must also be low, thus the Q outputs remain latched to the previous data -Only when the enable input is high can the state of the latch change -When the enable line is active, a gated SR latch is identical in operation to a SR latch -The Enable line is sometimes a clock signal, but it is usually a read or write strobe.Gated D latch-an extension of gated SR latch with the removal of the invalid input states -done by removing one input and making the other input as its inverse -the output is available only with the Enable signal is active -this latch is also called as "Transparent latch" -D latches are often used in I/O ports of integrated circuits.D Flip-flop-D input of the D flip-flop is a synchronous input because data on the input are transferred to the flip-flop's output only on the triggering edge of the clock pulse -when D is HIGH, the Q output goes HIGH on the triggering edge of the clock pulse, and the flip-flop is SET -when D is LOW, the Q output goes LOW on the triggering edge of the clock pulse, and the flip-flop is RESET.JK flip flop-an enhancement of SR flip flop where the invalid or the forbidden state is no longer a forbidden state -hence when J=K=1 the flip flop goes to "toggle" state (i.e) the state is inverted at each clock pulse -the output of the flip flop depends on the clock signal -it is a synchronous deviceWhat is a sequential circuit?A type of combinational circuit that, with the use of memory elements capable of storing binary information, produces an output based on both present and previous inputsWhat are the two types of sequential circuitsSynchronous and asynchronousWhat is a clock?A clock is a type of signal that behaves as a sort of metronome, fluctuating between high and low statesWhat is a metastable state?Metastable state is the state at which a circuit is unable to remain at a stable 0 or 1 logic level.What is meant by "a positive-edge flip-flop"?During a positive edge flip flop the second latch is on OPEN when the clock is at highDifference between a latch and a flip-flop.A latch is an electronic device whereas a flip-flop is a digital memory circuit -latch is level triggered -flip-flop is edge triggered -A flip-flop's output only changes with respect to a control signal, -latch's output changes immediately.What is the functionality of D flip-flop?In a D flip-flop the inputs are never equal at the same moment in timeWhat input conditions puts an SR NAND latch into an indeterminate state?If S'=0 & R'=0 then both the outputs goes HIGH and this condition is called an ambiguous/forbidden statecombinational circuitA circuit whose output is solely determined by its input values consists of logic gates whose outputs at any time are determined from the present combination of inputs.multiplexer-(MUX) is a device that allows digital information from several sources to be routed onto a single line for transmission over that line to a common destination -the basic multiplexer has several data-input lines and a single output line -also has data-select inputs, which permit digital data on any one of the inputs to be switched to the output line -there are 2n input lines and n selection lines whose bit combinations determine which input is selected.demultiplexerA demultiplexer (DEMUX) basically reverses the multiplexing function. It takes digital information from one line and distributes it to a given number of output lines. For this reason, the demultiplexer is also known as a data distributor.What is the number of output line/lines in a multiplexer circuit?1What is the maximum number of input lines in a multiplexer if there are n selections lines in the circuit?2^n input lines.Multiplexer is also called asData selectorDe-multiplexer is also called asData distributorWhat is the maximum number of selection lines required to implement a Boolean function of n variables using a multiplexer?2^n-1In 1-to-8 demultiplexer, how many select lines are required?3How many NOT and AND gates are required for the construction of a 8-to-1 multiplexer?7 NOT gates, 8 AND gatesdecoderA decoder is a digital circuit that detects the presence of a specified combination of bits(code) on its inputs and indicates the presence of that code by a specified output level. It is a combinational circuit that converts binary information from n input lines to a maximum of 2n unique output lines.encoder- a combinational logic circuit that essentially performs a "reverse" decoder function. -accepts an active level on one of its inputs representing a digit and converts it to a coded output. -It is a combinational circuit that has 2n (or fewer) input lines and n output lines. -has the limitation that only one input can be active at any given time -If two inputs are active simultaneously, the output produces an undefined combination -an output with all 0's is generated when all inputs are 0 and also when Y0 is 1.priority encoderA priority encoder is an encoder circuit that includes the priority function -the operation of the priority encoder is such that if two or more inputs are equal to 1 at the same time, the input having the highest priority will take precedence -A valid-output indicator (V) is set to 1 only when one or more of the inputs are equal to 1 -If all inputs are 0, V is equal to 0 and the other two outputs of the circuit are not used.What is an encoder?An encoder is a combinational logic circuit that essentially accepts an active level on one of its inputs representing a digit and converts it to a coded output. It has 2n or less inputs and n outputsWhat is a decoder?A decoder is a digital combinational circuit that indicates the presence of a code by a specified output level by detecting the presence of a previously specified combination of bits. Binary information is converted from n input lines to a maximum of 2n outputs.For 8-bit input encoder how many combinations are possible?2^8If two inputs are active on a priority encoder, which will be coded on the output?the higher valueMention the applications of encoder and decoder circuits.-can be used in various industries, to synchronize motors, detect metal or automate homes. -used as health monitoring systems in the medical field, or to generate and send messages securely through codeWhat is a priority encoder circuit, and how does it differ from a regular encoder?An encoder converts one of 2n inputs into an n-bit output whereas a priority encoder generates an output code based on the highest prioritized inputHalf AdderHalf Adder is a circuit that contains two inputs (augend and addend) and two outputs (Sum and Carry). Half Adder is used to design simple circuits that perform single addition operation using logic gates.full-adder-has three inputs and two outputs -The three inputs represent the two significant bits to be added and the carry from the lower significant position -The two outputs are for sum and carry. -designed with the help of two half-adder -The first half-adder is used to add A and B -The second half-adder adds the result of first half-adder with the CIN and produces the final output S. -If any of the two half-adder produces a carry there will be an output carry. - COUT will be an OR function of the half-adder carry outputs.half-subtractor-a combinational circuit which is used to perform subtraction of two bits -it has two inputs (minuend and subtrahend) and two outputs (difference and borrow).full subtractor- combinational circuit -made by combining two half-subtractors and an additional OR-gate -has borrowed in capability and allows cascading which results in the possibility of multi-bit subtraction.What is overflow condition?Occurs when a calculation results in a sum that is larger than the largest number that can be represented.What is magnitude comparator?A type of combinational circuit in which two digital numbers are compared to find whether one number is greater, lesser or equal to the other.Explain how a half adder and a full adder differ in their functionality.-Half adders have two input bits whereas -full adders have three input bits. -Full adders are made of two EX-OR gates, two AND gates and an OR gate, -half adders are made of an AND gate and an EX-OR gate -A full adder produces a sum of three inputs and carry value whereas -a half adder produces a sum of two inputs.gate-a multi-input hardware device that has two levels of output -The output level (HIGH/LOW) of this gate is repeatable function of the two-level combinations applied to its inputs -Logic gates perform basic logical functions and are the fundamental building blocks of digital integrated circuits.basic logic gatesAND, OR and NOT.universal logic gatesNAND and NORtruth tableIt shows the output for each possible input.Timing diagramTiming diagram is basically a graph that accurately displays the relationship of two or more waveforms with respect to each other on a time basis. For example, the time relationship of the output pulse to the input pulse.NOT gate-performs the operation called inversion or complementation. -The inverter changes one logic level to the opposite level -changes a 1 to a 0 and a 0 to a 1. - It is represented as A', or A with a bar over the top.AND gate-one of the basic gates that can be combined to form any logic function -can have two or more inputs -performs what is known as logical multiplication -composed of two or more inputs and a single output -produces a HIGH output only when all of the inputs are HIGH -when any of the inputs is LOW, the output is LOW. It is representedby a dot (.)OR gate-basic gates from which all logic functions are constructed. -can have two or more inputs -performs what is known as logical addition -An OR gate produces a HIGH on the output when any of the inputs is HIGH -The output is LOW only when all of the inputs are LOW -Therefore, an OR gate determines when one or more of its inputs are HIGH and produces a HIGH on its output to indicate this condition -An OR gate is represented by a plus (+) sign.NAND gate-can be used as a universal gate -can be used in combination to perform the AND, OR, and inverter operations -implies an AND function with a complemented (inverted) output. -produces a LOW output only when all the inputs are HIGH. -When any of the inputs is LOW, the output will be HIGH. -NAND gate is a NOT-AND gate which is equal to an AND gate followed by a NOT gate The symbol is an AND gate with a small circle on the outputNOR gate-can also be used as a universal gate -NOR gates can be used in combination to perform the AND,OR, and inverter operations. -implies an OR function with an inverted (complemented) output -A NOR gate produces a LOW output when any of its inputs is HIGH. -Only when all of its inputs are LOW is the output HIGH.EX-OR gate-formed by a combination of other gates. -the XOR gate performs the function of the OR gate but only if there is 1s and 0s at the input -if the inputs are same then output is true else falseXNOR gate-formed by a combination of other gates(ex.NAND, NOR) -the XOR gate has only two inputs.variable- a symbol used to represent an action, a condition, or data -Any single variable can have only a 1 or a 0 value.complementThe complement is the inverse of a variable and is indicated by a bar over the variable (over bar).Boolean algebraBoolean algebra provides a concise way to express the operation of a logic circuit formed by a combination of logic gates so that the output can be determined for various combinations of input values.characteristic equationdefines the state of each flip-flop as a function of its inputs and previous state Q refers to the present state and Q(next) refers to the next state after the occurrence of the clock pulse.excitation tableshows the minimum inputs that are necessary to generate a particular next state when the current state is knownwhat is a flip flopa binary storage device used to store one bit of information. Each flip-flop is constructed from an interconnection of gates.most efficient flip flopedge-triggered D flip-flopfixed-function logic devices,the logic functions are set by the manufacturer and cannot be altered points on the chip are connected to the package pins to allow input and output connections to the outside worldprogrammable logicProgrammable logic requires both hardware and software Programmable logic devices can be programmed to perform specified logic functions and operations by the manufacturer or by the user.advantages of programmable logicdevices use much less board space for an equivalent amount of logic designs can be readily changed without rewiring or replacing components logic design can generally be implemented faster and with less cost implement small segments of logic, it may be more efficient to use fixed- function logic.positive logicIn digital logic, true is 1 and false is 0 1 represented by a higher voltage called HIGH 0 represented by LOWcodesGroups of bits (combinations of 1s and 0s), used to represent numbers, letters, symbols, instructions, and anything else required in a given application.Logic LevelsThe voltages used to represent a 1 and a 0 are called logic levels. Ideally, one voltage level represents a HIGH and another voltage level represents a LOW In a practical digital circuit,however, a HIGH can be any voltage between a specified minimum value and a specified maximum value. Likewise, a LOW can be any voltage between a specified minimum and aspecified maximum. There can be no overlap between theaccepted range of HIGH levelsand the accepted range of LOW levels.Rise time (tr)The time required for a pulse to go from its LOW level to its HIGH levelfall time (tf).and the time required for the transition from the HIGH level to the LOW levelis calledpositive-going pulse,the leading edge is a rising edge, and the trailing edge is a falling edge.pulse widtha measure of theduration of the pulse and is often defined as the time interval between the 50% points onthe rising and falling edges.periodic pulse waveformperiodic pulse waveform is one that repeats itself at a fixed interval, called a periodfrequency( f )the rate at which a waveform repeats itself and is measured in hertz (Hz) reciprocal of the period.characteristic tabledefines the state of each flip-flop as a function of its inputs and previous state. Q refers to the present state and Q(next) refers to the next state after the occurrence of the clock pulse.master slave jk flip flopmaster-slave flip-flop eliminates all the timing problems by using two SR flip-flops connected together in a series configuration.JK vs. SR flip flop-when both inputs of SR flip flop is set to 1, the circuit produces the invalid states as outputs -in case of JK flip flop, there are no invalid states even if both 'J' and 'K' flip flops are set to 1.k mapmethod used to minimize Boolean expressions without having to use Boolean algebra theorems and equation manipulations. A K-map can be thought of as a special version of a truth table .state tablestate table representation of a sequential circuit consists of three sections labeled present state, next state and output The present state designates the state of flip-flops before the occurrence of a clock pulse.