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4700 Test 1

Terms in this set (56)

expandability
an architectural quality attribute that reflects the ability of designers to create compatible implementations covering a range of price/performance points
argument register
in associative memory, this holds the value being searched for
delayed page fault
this can occur during the executing of a string or vector instruction when part of an operand is present in physical memory and the rest is not
segment fault
when a location of variable-sized region of logical memory is referenced but not currently mapped to a location in physical memory
write-through
process whereby writes to cached locations update main memory immediately
SAM
type of memory that uses relative addressing to locate the next item to be accessed
key register
determines bit positions where matching is significant in associative memory
factors that can increase/decrease hit ratio1.) Depending how long the program has been running
2.) Depending on the data structure being manipulated
3.) During loop reiteration

are all examples of factors that can increase/dec HR
name (3) factors that can increase/decrease hit ratio
Yes, avg times are different since write back only writes a line that has been altered back to memory if it is displaced
does write-through or write-back policy affect avg time per memory access?
Dhrystones
benchmark for integer arithmetic
Overclocking a CPU increases performance at the expense of increased power consumption. Underclocking can be used to reduce power requirements at the expense of decreased performance.
describe overclocking v underclocking
LINPACK
benchmark used for vector-oriented, floating point arithmetic
Livermore Loops
scientific, floating-point benchmark
Whetstones
scalar operation, floating-point benchmark
CPU benchmark by SPEC. SPEC requires that all aspects of hardware be disclosed for each system under test.
widely referenced, suite of benchmarks containing this most-quoted benchmark for integer or floating-point performance. They are widely seen as fair and useful.
Dhrystones
MIPS benchmark
FIFO
This algorithm could be used in an associative cache to replace the line that has resided in cache for the longest time
the von neumann execution cycle is the sequence of steps that occur and repeat while a program is running.
Fetch instruction
Decode instruction
Generate address of operand(s)
Fetch operand(s)
Perform operation
Store result
Repeat
what is the von neumann execution cycle and list steps
The von neumann bottleneck is caused by the fact that data and instructions use a common memory bank and bus. Harvard Architecture addresses this problem by giving data and instructions their own respective memory and bus.
what is the von neumann bottleneck
LINPACK
benchmark used for TOP500
access time is how long it takes to read or write one item of data. cycle time is the interval between successive reads or writes.
contrast access time vs cycle time
cache
SRAM is used in ___ memory
Main
DRAM is used in ____ memory
latches/flipflops
SRAM is an array of _____ .
capacitors
DRAM is an array of ____ .
pros:
-r/w
-high info density
-low cost

cons:
volatile
must be refreshed
slow
pros and cons of semiconductor DRAM (MM)
MRAM is a semiconductor/magnetic hybrid that uses principleofmagnetoresistance. It is nonvolatile, randomly addressable. less energy to read; higher voltage to write.
what is MRAM and why is it different/better?
1.) processing unit: control logic and hardware to perform arithmetic/logical operations
2.) memory system: stores both data and instructions
3.) I/O system: devices for receiving and sending data
name and describe the three main subsystems of a computer
monetary costs: cost over time including maintenance costs
power consumption: costs related to power the system uses
volume/mass: costs related to the physical space the system takes up
name (3) types of costs associated w computer systems
Illustrates that timing is an important factor affecting computer architecture besides quality or expandability. Motorola 680000 CPU exhibited expandability, ease of use and increased performance but months behind Intel 8088 chip that had worse performance, cheaper chip that was ultimately selected for the IBM PC.
Describe the IBM PC CPU selection battle
Generality- the variety of programs for which a system is well-suited
Reliability - how the entire system stays up and responds to failures
Expandability - How easy it is to allow for performance growth, expand CPU or memory system performance.
Ease of use - How easy it is to create programs for systems programmer
Compatibility - The ability of different computers to run the same machine language or executable programs.
list and describe the different quality attributes of computer systems
Expandability
An architectural quality factor of a system- how easy it is to increase the capabilities of an architecture to allow for growth in performance (processing power, memory size, etc.)
Generality
An architectural quality factor that refers to the variety of applications for which a machine is well-suited
Cost, Openness, or timing
What are other factors besides quality that can affect success for computer systems?
Whether an architecture is open or proprietary can influence it's success. Being proprietary can limit manufacturers to offer compatible hardware, being open can increase competition and may drive prices down. An example of this is Beta v VHS. Beta was superior but proprietary. Lesser quality VHS won the market because it was open and able to be made by many manufacturers.
How does openness affect systems? Provide example.
K 2^10 10^3
M 2^20 10^6
G 2^30 10^9
MHz conversion
CPU clock frequency
Tells how many cycles the CPU goes through in one second. 1/cycletime in (ns)

Does not tell about how much work done per cycle.
MIPS is calculated on integer instructions; more common in general computing. MFLOPS is suited for scientific code with floating-point calculations.
When should you use MIPS over MFLOPS?
CPU logic technology is faster than the memory technology used to store information.
Gap widened over time since CPU CYCLE TIMES DECREASED faster than MM ACCESS TIMES.
Describe the CPU-memory gap problem
High order interleaving uses upper high order bits to select memory bank.

- is simple to implement in HW
- One device is active R/W- others are idle
-Cycle time is only as fast as 1 device
Describe aspects of high order interleaving
Low order bits are used to select memory devices. Address space is not in contiguous blocks.
Advantages:
-overlap accesses btw devices
-as long as access is sequential can keep all devices busy continuously.
-potential 4x increase in mem access opposed to high order interleaving.

Disadvantages:
-more complex HW
-increased cost
Describe low order interleaving and list some advantages/disadvantages.
In RAM any storage location can be accessed in the same amount of time.
-numerical address
-use ABSOLUTE addressing
-accessed by bit, word, or orthogonal slice.
-EXs: DRAM, SRAM
Give examples of RAM and describe access
Sequential access memory access time is dependent on the location from current location. SAM uses relative addressing.
-RELATIVE ADDRESSING
EX: Magnetic tape memory. Never use this as MM.
Describe access of SAM and examples
Random access, sequential access, associative memory (CAM)
What are (3) types of memory organization?
CAM or Associative memory information is located based on the content.
-expensive
-locating takes same amount of time
-can be used for assoc. cache memory
Describe Associative memory (CAM) and describe access
L1 cache
Which level of cache is split into data and instruction?
L2 cache
Which level of cache is general purpose and each core has it's own?
L3 cache
Which level of cache is largest and is shared between all cores?
Refill line


locality
Cache is typically accessed by ____. This is efficient due to the principle of ___.
Implementation
The actual, physical realization of a computer system
Babbage's Analytical Engine
The first design for a programmable digital computer, but a working model was never completed
Integrated circuits
This tech development was an important factor in moving from the second generation to third generation computers.
CDC6600
First supercomputer
Microcontroller
Type of computer embedded in IOT devices
Compatibility
An architectural quality attribute that expresses the support provided for previous or other architectures by the current machine
MFLOPS
A CPU performance index that measures the rate at which computations can be performed on real numbers rather than integers
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