## Related questions with answers

Question

Suppose that two numbers in signed two’s-complement form have been added. $S_1$ is the sign bit of the first number, $S_2$ is the sign bit of the second number, and $S_T$ is the sign bit of the total. Suppose that we want a logic circuit with output E that is high if either overflow or underflow has occurred; otherwise, E is to remain low. 1. Write the truth table. 2. Find an SOP expression composed of minterms for E. 3. Draw a circuit that yields E, using AND, OR, and NOT gates.

Solution

VerifiedStep 1

1 of 5We know from the previous that overflow and underflow are not possible if the two numbers to be added have opposite signs. Underflow or overflow occurr when the two numbers to be added have the same sign and the result has the opposite sign.

## Create an account to view solutions

By signing up, you accept Quizlet's Terms of Service and Privacy Policy

## Create an account to view solutions

By signing up, you accept Quizlet's Terms of Service and Privacy Policy

## Recommended textbook solutions

#### Fundamentals of Electric Circuits

6th Edition•ISBN: 9780078028229Charles Alexander, Matthew Sadiku2,120 solutions

#### Physics for Scientists and Engineers: A Strategic Approach with Modern Physics

4th Edition•ISBN: 9780133942651 (4 more)Randall D. Knight3,508 solutions

#### Electrical Engineering: Principles and Applications

7th Edition•ISBN: 9780134484143 (1 more)Allan R. Hambley1,451 solutions

#### Advanced Engineering Mathematics

10th Edition•ISBN: 9780470458365 (3 more)Erwin Kreyszig4,134 solutions

## More related questions

1/4

1/7